Proving correctness before manufacture.
WHY IT DOMINATES EFFORT
A defect in a manufactured chip cannot be patched, and respinning costs a great deal and months.
WHAT PROPORTION OF EFFORT IT TAKES
Frequently more than design itself.
WHAT SIMULATION-BASED VERIFICATION IS
Exercising the design with stimulus and checking responses.
WHAT DIRECTED TESTS ARE
Specific scenarios, written deliberately.
WHAT CONSTRAINED RANDOM TESTING IS
Generating random stimulus within defined constraints.
WHY THAT HELPS
It explores cases nobody thought to write.
WHAT COVERAGE MEASURES
Which parts of the design and which scenarios have been exercised.
WHY IT MATTERS
It answers whether verification is actually complete.
WHAT FORMAL VERIFICATION DOES
Proves mathematically that properties hold for all inputs.
WHAT IT SUITS
Critical properties, and control logic.
WHAT IT DOES NOT SCALE TO
Entire large designs, generally.
WHAT EMULATION PROVIDES
Running the design on specialised hardware, far faster than simulation.
WHAT THAT ENABLES
Running real software on the design before manufacture.
WHAT TO VERIFY BEYOND FUNCTION
Timing Power Behaviour at boundaries and on reset
